David
Xue
PARTNER
Intellectual Property
DAVID@KXTLAW.COM
650-379-6454
LinkedIn
David T. Xue, Ph.D., practices in the area of intellectual property law. Dr. Xue has extensive experience representing clients in a wide array of patent-related matters, including strategic counseling, portfolio management and monetization, freedom to operate analysis, patent prosecution, patent litigation, and inter partes review (IPR) proceedings. He counsels technology companies on computer software and hardware, semiconductor devices, networking devices, electronic devices, medical devices, wireless communication networks, network security and storage, artificial intelligence, deep learning, machine learning, web-based applications, electronic transactions and fraud prevention, social networking, online search, multimedia content and digital documentation, clean energy and business methods.
Prior to entering private practice, Dr. Xue worked in management roles at two major Chinese technology companies: Hangzhou-based online business-to-business e-commerce company Alibaba Inc., where he was the director of product development; and Beijing-based fabless semiconductor firm Vimicro International, where he served as vice president. He has written and spoken on intellectual property and electrical engineering topics for many years.
While completing his legal studies in 2007, he was recognized by the Center for Computer-Assisted Legal Instruction with the Excellence for the Future Award for achievement in the study of Venture Capital Law. In 2006, he received the Outstanding Chinese Patent Award by the State Intellectual Property Office of China.
EDUCATION
University of San Francisco
J.D.
University of California, Berkeley
Ph.D., Electrical Engineering and Computer Sciences
University of Maryland
M.S., Computer Science
Tsinghua University
B.E., Computer Science and Technology
PREVIOUS EXPERIENCE
Duane Morris LLP (Partner)
Goodwin Procter LLP
Perkins Coie LLP
ADMISSIONS
State of California
United States Patent and Trademark Office (USPTO)
LANGUAGES
English
HONORS AND AWARDS
CALI Award for excellent achievement in the study of Venture Capital Law, The Center for Computer-Assisted Legal Instruction, 2007
Outstanding Chinese Patent Award, State Intellectual Property Office of China (CNIPA), 2006
Speaking Engagements
Featured Speaker on “Recent Developments in U.S. Litigation,” IP Seminar for in-house counsels of Chinese high-tech companies, Beijing, October 2015
Featured Speaker on “Recent U.S. Patent Trends, America Invents Act (AIA) and Its Potential Impacts on Chinese Companies,” Conference on Overseas Intellectual Property Protection for Chinese Enterprises, hosted by China’s Ministry of Industry and Information Technology, Beijing, January 2013
Invited Speaker in “Latest Trend in U.S. Patent Law and Strategies For Early Litigation Resolution,” 8th China IP International Annual Forum, Beijing, January 2018.
Publications
Co-author, “Augmented Reality Serves Up Unique IP Challenges,” IP Watch Section of San Francisco Daily Journal, October 19, 2016
Co-author, “The ITC as an indicator of China’s Potential for Innovation,” Intellectual Property Today, January 2012
Co-author, “Practical Implications for Business Method Patenting Following Ex parte Lundgren,” New Matter of the Intellectual Property Law Section of the State Bar of California, Vol. 31, No. 3, pp. 21-30, October 2006
Co-author, “Post Global Routing Crosstalk Synthesis,” IEEE Trans. on Computer-Aided Design, Vol. 16, No. 12, pp. 1418-1430, December 1997
Co-author, “TIGER: An Efficient Timing-Driven Global Router for Gate Array and Standard Cell Layout Design,” IEEE Trans. on Computer-Aided Design, Vol.16, No.11, pp. 1323-1331, November 1997
Author, “Post Routing Interconnect Performance Optimization,” Ph.D. Dissertation, Also UCB/ERL Memo M97/60, August 1997
Co-author, “Post Global Routing Crosstalk Risk Estimation and Reduction,” Proc. IEEE/ACM Int’l Conf. on Computer-Aided Design, pp. 302-309, November 1996
Co-author, “A Post Global Routing Optimization Approach to Crosstalk Estimation and Reduction,” Proc. TECHCON 96, September 1996
Co-author, “Post Routing Performance Optimization via Multi-Link Insertion and Non-Uniform Wiresizing,” Proc. IEEE/ACM Int’l Conf. on
Computer-Aided Design, pp. 575-580, November 1995
Co-author, “Post Routing Performance Optimization via Tapered Link Insertion and Wiresizing,” Proc. European Design Automation Conf., pp. 74-79, September 1995
Co-author, “New Approaches for On-Chip Power Switching Noise Reduction,” Proc. Custom Integrated Circuits Conf., pp. 133-136, May 1995. Also UCB/ERL Memo, M94/94
Co-author, “A New Performance-Driven Global Routing Algorithm for Gate Array,” Proc. Int’l Conf. on Very Large Scale Integration, pp. 8.3.1 – 8.3.10, September 1993
Co-author, “Performance-Driven Steiner Tree Algorithms for Global Routing,” Proc. 30th Design Automation Conf., pp. 177-181, June 1993